Power Electronics
Wind Power Generation Control System Core Board
Core Features
● Dual-core intelligent control, exceptional performance
Adopting the golden combination of Intel FPGA and TI DSP. The FPGA handles synchronous acquisition of multiple sensors, high-speed communication, and hardware protection; while the DSP excels in core algorithms such as maximum power point tracking (MPPT) and vector control, maximizing wind energy conversion efficiency.
● Strong grid support and cross-border capability
Fully supports grid low-voltage/high-voltage ride-through (LVRT/HVRT) requirements, features active reactive power compensation capability, helps stabilize the power grid, and complies with the latest national grid connection standards.
● End-to-end hardware-level security protection
A multi-layered safety protection mechanism—covering overcurrent, overvoltage, overspeed, and vibration—is built from hardware (FPGA) to software (DSP), with a response time of less than 1 μs, ensuring the safe and reliable operation of the fan.
● Industrial-grade interconnectivity
It integrates Gigabit Ethernet, CAN FD, and fiber optic interfaces, enabling seamless connectivity with the master PLC, pitch control system, condition monitoring system, and remote monitoring center.
● High-reliability design
Industrial-grade chip selection, supporting wide-temperature operation from -40℃ to +85℃, resilient to harsh wind farm environments and meeting long-term operational lifespan requirements.
Email: sales@sengkeda.com
Core specification parameters
| Parameter Category | Detailed indicators |
| FPGA processor | Intel Cyclone 10 LP 10CL016YF484C8G |
| FPGA logic unit | 15,408 LEs |
| DSP processor | TI TMS320F28335PGFA |
| DSP clock frequency | 150 MHz (with a floating-point unit FPU) |
| System memory | 512 MB DDR3L (on the FPGA side) + 512 KB Flash (on the DSP side) |
| ADC channel | 16-channel 16-bit high-precision ADC (built into DSP) + external ADC expansion |
| Control cycle | Current loop ≤ 10 μs (implemented in FPGA), speed/position loop ≤ 50 μs |
| MPPT algorithm | Supports perturbation observation method, incremental conductance method, and others. |
| Communication protocol | IEC 61400-25, CANopen, Modbus TCP, EtherNet/IP |
| Operating temperature | -40°C ~ +85°C (Industrial Grade) |
| Power supply | DC 24V (industrial standard), total board power consumption < 15W |
Interface Information
Acquisition and Control Interface (primarily implemented by FPGA)
| Interface Type | Quantity/Specification | Function Description and Wind Power Applications |
| PWM drive output | Route 12 (High Resolution) | Generate PWM signals for the drive converter IGBT, supporting dead-time and three-level control. |
| Encoder input | 4-way differential input | Acquire the generator and main shaft speed signals (incremental encoder). |
| Absolute encoder interface | Route 2 | Supports EnDat2.2, SSI, and Biss-C protocols for precise position measurement. |
| Analog signal acquisition | 16-channel + 16-bit ADC | Collect DC bus voltage, three-phase grid voltage/current, generator current, temperature, vibration, and other parameters. |
| Hardware protection input | Multiple channels | Connect to safety chain signals such as emergency shutdown, overspeed, and excessive vibration to achieve nanosecond-level hardware protection. |
| Digital Input (DI) | Channel 16 (Optocoupler Isolation) | Collect status signals from circuit breakers, maintenance switches, torsion cable switches, and other such devices. |
| Digital Output (DO) | Channel 8 (Relay/MOSFET Output) | Control actuators such as contactors, cooling fans, hydraulic pumps, and pitch control systems. |
Communication and System Interface (primarily implemented in collaboration by DSP and FPGA)
| Interface Type | Quantity/Specification | Function Description and Wind Power Applications |
| Real-time industrial network | 2x 10/100/1000M RJ45 | Supports EtherNet/IP and IEC 61850 for communication with the master station and SCADA systems. |
| Fieldbus | 2x CAN FD (isolated) | Used to connect the main controller and the pitch system, supporting the CANopen protocol. |
| Fiber optic interface | 2x SFP optical ports | For reliable long-distance communication or ring network deployment. |
| Maintenance interface | 1x USB 2.0, 1x RS-232 | For local debugging, program updates, and data export. |
| Debugging interface | JTAG (FPGA+DSP) | For program downloading and debugging. |
| Expansion interface | FMC (HPC) Connector | For expanding high-speed AD/DA, synchronous acquisition cards, and more. |
Software and Features
Main functions of FPGA:
- Ultra-high-speed acquisition: Synchronously acquire data from multiple sensor channels.
- Real-time control: Implement hardware current-loop control and generate PWM.
- Security Guardian: Executes hardware security logic and responds to faults at the first opportunity.
- Protocol offloading: Handles the underlying data link for Ethernet and encoder protocols.
Main functions of DSP:
- Core algorithms: Perform complex computations such as MPPT algorithm execution, grid vector control, and reactive power compensation.
- System Management: Perform fault diagnosis, condition monitoring, and energy management.
- Communication scheduling: Handles protocol stacks such as IEC 61400-25 and CANopen.
Typical application scenarios
- Wind turbine main control system: the core controller for doubly-fed and full-power converters.
- Wind Turbine Pitch Control System: High-Performance Pitch Controller.
- Wind Farm Monitoring: Data Acquisition and Communication Management Unit.
- Experimental Test Platform: Research and Development of Wind Energy Conversion Systems.
Keywords:Wind Power Generation Control System Core Board
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